( en | de | ru )

 

Disambiguation of "Hsieh, R."

Author of the publication

copydeleteadd this publication to your clipboard
A 500MHz Random-Access Embedded 1Mb DRAM Macro in Bulk CMOS.

, , , , , , , , , , and . ISSCC, page 270-271. IEEE, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Shuo-Chun Hsieh

Shelley Ching-yu Hsieh

Ju-Lan Hsieh

Chih-sheng Hsieh

Tai-Chiung Hsieh

 

Other publications of authors with the same name

FLIP: Flexibel Learning in Physics and Mechanics., , , , , , , and . CALISCE, volume 1108 of Lecture Notes in Computer Science, page 349-355. Springer, (1996)A 500MHz Random-Access Embedded 1Mb DRAM Macro in Bulk CMOS., , , , , , , , , and 1 other author(s). ISSCC, page 270-271. IEEE, (2008)Delay test generation., , , and . DAC, page 486-491. ACM, (1977)The Demonstration of Gate Dielectric-fuse 4kb OTP Memory Feasible for Embedded Applications in High-k Metal-gate CMOS Generations and Beyond., , , , and . VLSI Circuits, page 208-. IEEE, (2019)A Reliable Triple-Level Operation of Resistive-Gate Flash Featuring Forming-Free and High Immunity to Sneak Path., , , , , and . IRPS, page 1-6. IEEE, (2021)NVDimm-FE: A High-density 3D Architecture of 3-bit/c 2TnCFE to Break Great Memory Wall with 10 ns of PGM-pulse, 1010 Cycles of Endurance, and Decade Lifetime at 103 °C., , , , , , , , , and . VLSI Technology and Circuits, page 359-360. IEEE, (2022)A Pulsed RTN Transient Measurement Technique: Demonstration on the Understanding of the Switching in Resistance Memory., , , , , and . IRPS, page 1-4. IEEE, (2020)3-bits-per-cell 2T32CFE nvTCAM by Angstrom-laminated Ferroelectric Layers with 10¹¹ Cycles of Endurance and 4.92V of Ultra-wide Memory-windows for In-memory-searching., , , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)