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On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform.

, , , , and . IEEE Trans. Circuits Syst. Video Techn., 17 (7): 814-822 (2007)

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Hardware-Efficient Architecture Design for Zerotree Coding in MPEG-4 Still Texture Coder., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 86-A (2): 472-479 (2003)On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform., , , , and . IEEE Trans. Circuits Syst. Video Techn., 17 (7): 814-822 (2007)Application Layer Error Correction Scheme for Video Header Protection on Wireless Network., , , , , and . ISM, page 499-505. IEEE Computer Society, (2005)Analysis and Architecture Design of JPEG2000., , , and . ICME, IEEE Computer Society, (2001)Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000., , , and . ISCAS (4), page 329-332. IEEE, (2002)Architecture and Analysis of Color Structure Descriptor for Real-Time Video Indexing and Retrieval., , , and . PCM (2), volume 3332 of Lecture Notes in Computer Science, page 130-137. Springer, (2004)Design and implementation of JPEG encoder IP core., , , and . ASP-DAC, page 29-30. ACM, (2001)Reconfigurable architecture for video applications., , , , and . SoCC, page 21-24. IEEE, (2007)Analysis and architecture design of block-coding engine for EBCOT in JPEG 2000., , , and . IEEE Trans. Circuits Syst. Video Techn., 13 (3): 219-230 (2003)124Ms/s pixel-pipelined motion-JPEG 2000 codec without tile memory., , , , , , and . ISSCC, page 1586-1595. IEEE, (2006)