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Partitioning-based standard-cell global placement with an exact objective., и . ISPD, стр. 18-25. ACM, (1997)Prim-Dijkstra tradeoffs for improved performance-driven routing tree design., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (7): 890-896 (1995)On implementation choices for iterative improvement partitioning algorithms., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (10): 1199-1205 (1997)Faster minimization of linear wirelength for global placement., , , , , , и . ISPD, стр. 4-11. ACM, (1997)Analytical Engines are Unnecessary in Top-down Partitioning-based Placement., , , , , , и . VLSI Design, 10 (1): 99-116 (1999)ePlace: Electrostatics Based Placement Using Nesterov's Method., , , , , , и . DAC, стр. 121:1-121:6. ACM, (2014)PROS 2.0: A Plug-In for Routability Optimization and Routed Wirelength Estimation Using Deep Learning., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (1): 164-177 (2023)On the Bounded-Skew Clock and Steiner Routing Problems., , и . DAC, стр. 508-513. ACM Press, (1995)Quantified Suboptimality of VLSI Layout Heuristics., , и . DAC, стр. 216-221. ACM Press, (1995)Quadratic Placement Revisited., , , , и . DAC, стр. 752-757. ACM Press, (1997)