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Disambiguation of "Joshi, Rajiv V."

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Programmable supply boosting techniques for near threshold and wide operating voltage SRAM.

, and . CICC, page 1-4. IEEE, (2017)

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Rajiv Trehan

Rajiv Kumar

Paneerselvam Rajiv

Jidnyasa Joshi

Rajiv Grover

 

Other publications of authors with the same name

Design Of Provably Correct Storage Arrays., , and . VLSI Design, page 196-. IEEE Computer Society, (2001)A novel circuit topology for generating and validating digitally sense amplifier differentials for bulk and SOI., and . ESSCIRC, page 371-374. IEEE, (2005)A 115.1 TOPS/W, 12.1 TOPS/mm2 Computation-in-Memory using Ring-Oscillator based ADC for Edge AI., , , , , and . AICAS, page 1-5. IEEE, (2023)Read-disturb Detection Methodology for RRAM-based Computation-in-Memory Architecture., , , , and . AICAS, page 1-5. IEEE, (2023)Design Considerations and Implementation of a High Performance Dynamic Register File., and . VLSI Design, page 526-531. IEEE Computer Society, (1999)A New Field-assisted Access Scheme of STT-RAM with Self-reference Capability., , , , , and . DAC, page 63:1-63:6. ACM, (2014)Characterizing Hadoop applications on microservers for performance and energy efficiency optimizations., , , , and . ISPASS, page 153-154. IEEE Computer Society, (2016)A Cryo-CMOS Transmon Qubit Controller and Verification with FPGA Emulation., , , , , , , , , and 14 other author(s). DATE, page 13-16. IEEE, (2022)Design technology co-optimization for 10 nm and beyond., and . CICC, page 1. IEEE, (2014)Efficient analog circuit optimization using sparse regression and error margining., , , , and . ISQED, page 410-415. IEEE, (2016)