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A Combinatorial Analysis of Subcube Reliability in Hybercubes.

, and . IEEE Trans. Computers, 44 (7): 952-956 (1995)

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Finite Buffer Analysis of Multistage Interconnection Networks., and . IEEE Trans. Computers, 43 (2): 243-247 (1994)VLSI Performance of Multistage Interconnection Network Using 4*4 Switches., and . ICDCS, page 606-613. IEEE Computer Society, (1982)Performance Evaluation of a Dataflow Architecture., and . IEEE Trans. Computers, 39 (5): 615-627 (1990)Design and Performance of Generalized Interconnection Networks., and . IEEE Trans. Computers, 32 (12): 1081-1090 (1983)Bandwidth Availability of Multiple-Bus Multiprocessors., and . IEEE Trans. Computers, 34 (10): 918-926 (1985)Fair Scheduling in Internet Routers., and . IEEE Trans. Computers, 51 (6): 686-701 (2002)Extending Multistage Interconnection Networks for Multitasking., and . ICPP (1), page 151-158. CRC Press, (1992)Reliability Simulation of Multiprocessor Systems., and . ICPP, page 591-598. IEEE Computer Society Press, (1985)Enhancing Network Processor Simulation Speed with Statistical Input Sampling., , , , and . HiPEAC, volume 3793 of Lecture Notes in Computer Science, page 68-83. Springer, (2005)Performance characterization of multi-thread and multi-core processors based XML application oriented networking systems., , , and . J. Parallel Distributed Comput., 70 (5): 584-597 (2010)