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Design of high-Q varactors for low-power wireless applications using a standard CMOS process.

, , and . CICC, page 641-644. IEEE, (1999)

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An ultralow-power UHF transceiver integrated in a standard digital CMOS process: architecture and receiver., , , , and . IEEE J. Solid State Circuits, 36 (3): 452-466 (2001)A 1.2 V, 433 MHz, 10 dBm, 38% global efficiency FSK transmitter integrated in a standard digital CMOS process., , , and . CICC, page 179-182. IEEE, (2000)A 1.3 V low-power 430 MHz front-end using a standard digital CMOS process ISM wireless link., , , and . CICC, page 503-506. IEEE, (1998)A 1 V 5th-order Bessel filter dedicated to digital standard processes., , and . CICC, page 505-508. IEEE, (1999)Design of high-Q varactors for low-power wireless applications using a standard CMOS process., , and . CICC, page 641-644. IEEE, (1999)A 1.2V, 430MHz, 4dBm power amplifier and a 250muW front-end, using a standard digital CMOS process., , , , and . ISLPED, page 233-237. ACM, (1999)A low-power low-voltage transceiver architecture suitable for wireless distributed sensors network., , , and . ISCAS, page 56-59. IEEE, (2000)A 1 V, 1 mW, 434 MHz FSK receiver fully integrated in a standard digital CMOS process., , , , and . CICC, page 171-174. IEEE, (2000)Tradeoffs and design of an ultra low power UHF transceiver integrated in a standard digital CMOS process., , , and . ISLPED, page 273-278. ACM, (2000)