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Improving Network-on-Chip-based Turbo Decoder Architectures., and . J. Signal Process. Syst., 73 (1): 83-100 (2013)Implementation of a Flexible LDPC Decoder., , and . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (6): 542-546 (2007)Look-ahead sphere decoding: algorithm and VLSI architecture., and . IET Commun., 5 (9): 1275-1285 (2011)Testing Logic Cores using a BIST P1500 Compliant Approach: A Case of Study, , , and . CoRR, (2007)Hierarchical power supply noise evaluation for early power grid design prediction., , , and . SLIP, page 183-188. ACM, (2001)An electromigration and thermal model of power wires for a priori high-level reliability prediction., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 12 (4): 349-358 (2004)Optimized CORDIC core for frequency-domain motion estimation., , and . ICIP (3), page 1072-1075. IEEE, (2005)Error resilient JPEG2000 decoding for wireless applications., , , and . ICIP, page 2016-2019. IEEE, (2008)A flexible NoC-based LDPC code decoder implementation and bandwidth reduction methods., and . DASIP, page 261-268. IEEE, (2011)Result-Biased Distributed-Arithmetic-Based Filter Architectures for Approximately Computing the DWT., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (8): 2103-2113 (2015)