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Stash directory: A scalable directory for many-core coherence.

, and . HPCA, page 177-188. IEEE Computer Society, (2014)

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An Efficient Hardware-Based Multi-hash Scheme for High Speed IP Lookup., , , and . Hot Interconnects, page 103-110. IEEE Computer Society, (2008)BarrierWatch: characterizing multithreaded workloads across and within program-defined epochs., and . Conf. Computing Frontiers, page 5. ACM, (2011)Predicting Coherence Communication by Tracking Synchronization Points at Run Time., and . MICRO, page 351-362. IEEE Computer Society, (2012)Two-phase trace-driven simulation (TPTS): a fast multicore processor architecture simulation approach., , , , , and . Softw. Pract. Exp., 40 (3): 239-258 (2010)Stash directory: A scalable directory for many-core coherence., and . HPCA, page 177-188. IEEE Computer Society, (2014)Advanced hashing schemes for packet forwarding using set associative memory architectures., , , and . J. Parallel Distributed Comput., 71 (1): 1-15 (2011)MAESTRO: Orchestrating predictive resource management in future multicore systems., and . AHS, page 1-8. IEEE, (2011)Progressive hashing for packet processing using set associative memory., , , and . ANCS, page 153-162. ACM, (2009)CHAP: Enabling Efficient Hardware-Based Multiple Hash Schemes for IP Lookup., , , and . Networking, volume 5550 of Lecture Notes in Computer Science, page 756-769. Springer, (2009)TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation., , , , , , and . ICPP, page 446-453. IEEE Computer Society, (2008)