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Low-Power NoC Using Optimum Adaptation.

, , , and . Computational Intelligence in Digital and Network Designs and Applications, Springer, (2015)

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GNRFET/MOSFET Conjunction Power Gating Structures., , , and . MWSCAS, page 21-24. IEEE, (2018)Analysis and design of Network on Chip under high process variation., , and . ICECS, page 508-509. IEEE, (2015)Novel Routing Algorithm for Minimum on Delay with Process Variation and Congestion in Asynchronous NoC., , and . HPCC/CSS/ICESS, page 411-416. IEEE, (2015)Novel Adaptive Virtual Channels technique for NoC switch., , and . IDT, page 7-11. IEEE, (2011)High throughput asynchronous NoC switch for high process variation., , and . IDT, page 1-4. IEEE, (2013)High Performance GNR Power Gating for Low-Voltage CMOS Circuits., , , and . CoRR, (2019)Low-Power NoC Using Optimum Adaptation., , , and . Computational Intelligence in Digital and Network Designs and Applications, Springer, (2015)Corrigendum to "High throughput asynchronous NoC design under high process variation" Integr. VLSI J. (2015) 1-13., , and . Integr., (2016)Low leakage power NoC switch using AVC., , and . ISCAS, page 2549-2552. IEEE, (2012)Traffic-Based Virtual Channel Activation for Low-Power NoC., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (12): 3029-3042 (2015)