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Instruction Cache Locking Using Temporal Reuse Profile., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (9): 1387-1400 (2015)Adaptive Task-Based Intermittent Computing System With Parallel State Backup., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (6): 1798-1809 (June 2023)Towards the Universal Defense for Query-Based Audio Adversarial Attacks., , , and . CoRR, (2023)Towards the universal defense for query-based audio adversarial attacks on speech recognition system., , , and . Cybersecur., 6 (1): 40 (December 2023)AVA: Inconspicuous Attribute Variation-based Adversarial Attack bypassing DeepFake Detection., , , , and . CoRR, (2023)coxHE: A software-hardware co-design framework for FPGA acceleration of homomorphic computation., , , , , and . DATE, page 1353-1358. IEEE, (2022)Precise and scalable shared cache contention analysis for WCET estimation., , , and . DAC, page 1267-1272. ACM, (2022)Fast and Accurate Code Placement of Embedded Software for Hybrid On-Chip Memory Architecture., , , and . HPCC/CSS/ICESS, page 1008-1015. IEEE, (2014)Minimizing Update Bits of NVM-Based Main Memory Using Bit Flipping and Cyclic Shifting., , , , , , and . HPCC/CSS/ICESS, page 290-295. IEEE, (2015)An Implementation of Number Plate Recognition without Segmentation Using Convolutional Neural Network., , , , , and . HPCC/SmartCity/DSS, page 246-253. IEEE Computer Society, (2017)