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The Effect of the System Specification on the Optimal Selection of Clocked Storage Elements.

, , and . IEEE J. Solid State Circuits, 42 (6): 1392-1404 (2007)

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Energy-Delay Space Analysis for Clocked Storage Elements Under Process Variations., , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 360-369. Springer, (2006)Energy Efficiency of Power-Gating in Low-Power Clocked Storage Elements., , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 268-276. Springer, (2008)Logic Style Comparison for Ultra Low Power Operation in 65nm Technology., , , and . PATMOS, volume 4644 of Lecture Notes in Computer Science, page 181-190. Springer, (2007)The Effect of the System Specification on the Optimal Selection of Clocked Storage Elements., , and . IEEE J. Solid State Circuits, 42 (6): 1392-1404 (2007)