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Disambiguation of "Djahanshahi, Hormoz"

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Modeling of MOS varactors and characterizing the tuning curve of a 5-6 GHz LC VCO.

, , , , , , and . ISCAS (5), page 5071-5074. IEEE, (2005)

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Hormoz Mehmanesh

Hormoz Mehmanesh

Hormoz Afssar

Hormoz Ostowari

Hormoz Ansari

 

Other publications of authors with the same name

A Low-Variation Nonlinear Neuron Circuit., , , and . Journal of Circuits, Systems, and Computers, 8 (4): 447-451 (1998)Design and VLSI Implementation of a Unified Synapse-Neuron Architecture., , , and . Great Lakes Symposium on VLSI, page 228-233. IEEE Computer Society, (1996)On the Design of Vertical-Turn Solenoids for Magnetically Isolated Densely Integrated LC Oscillators., , , and . ISCAS, page 1-5. IEEE, (2018)On the Design of mm-Wave Self-Mixing-VCO Architecture for High Tuning-Range and Low Phase Noise., , , , , , , and . IEEE J. Solid State Circuits, 51 (5): 1210-1222 (2016)Gigabit-per-second, ECL-compatible I/O interface in 0.35-μm CMOS., , and . IEEE J. Solid State Circuits, 34 (8): 1074-1083 (1999)High-speed ECL-compatible serial I/O in 0.35 μm CMOS., , and . ICECS, page 59-62. IEEE, (1998)Modeling of MOS varactors and characterizing the tuning curve of a 5-6 GHz LC VCO., , , , , , and . ISCAS (5), page 5071-5074. IEEE, (2005)A Compact Dual-Core 26.1-to-29.9GHz Coupled-CMOS LC-VCO with Implicit Common-Mode Resonance and FoM of-191 dBc/Hz at 10MHz., , , , , , and . CICC, page 1-4. IEEE, (2020)Differential CMOS circuits for 622-MHz/933-MHz clock and data recovery applications., and . IEEE J. Solid State Circuits, 35 (6): 847-855 (2000)A 27-GHz low-power push-push LC VCO with wide tuning range in 65nm CMOS., , and . ISCAS, page 1141-1144. IEEE, (2011)