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A low-power RF/analog front-end architecture for LF passive RFID tags with dynamic power sensing.

, , , , , , and . IEEE RFID, page 60-66. IEEE, (2014)

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A low-power RF/analog front-end architecture for LF passive RFID tags with dynamic power sensing., , , , , , and . IEEE RFID, page 60-66. IEEE, (2014)Non-Linear Shunt Regulator With RF Power Detector for RFID Applications., , , , and . RFID, page 1-8. IEEE, (2020)A Differential Low Power Wake-Up Circuit Based on Systematic Offset for RFID Applications., , , and . SBCCI, page 1-6. IEEE, (2018)Track-and-Latch Comparator Design Using Associations of MOS Transistors and Characterization., , and . ICECS, page 1164-1167. IEEE, (2006)Low-Power/Low-Voltage analog front-end for LF passive RFID tag systems., , , , and . SBCCI, page 1-6. IEEE, (2013)Modeling of Short Circuit Power Consumption Using Timing-Only Logic Cell Macromodels., , , , and . SBCCI, page 222-227. IEEE Computer Society, (2000)Low power, high-sensitivity clock recovery circuit for LF/HF RFID applications., , , and . SBCCI, page 22:1-22:5. ACM, (2015)Low-frequency passive RFID systems implementation in CMOS technology: design considerations and tradeoffs., , , and . SBCCI, page 1-4. ACM, (2011)A tool for automatic design of analog circuits based on gm/ID methodology., , and . ISCAS, IEEE, (2006)T-shaped association of transistors: modeling of multiple channel lengths and regular associations., , , and . SBCCI, page 21-26. ACM, (2005)