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Algorithm-Hardware Co-Design of Distribution-Aware Logarithmic-Posit Encodings for Efficient DNN Inference.

, , , , and . CoRR, (2024)

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Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication., , , , , and . CoRR, (2021)Abstracting Sparse DNN Acceleration via Structured Sparse Tensor Decomposition., , , , and . CoRR, (2024)VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs., , , , , , , and . HPCA, page 259-272. IEEE, (2023)Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators., , , , , , , and . PACT, page 30-44. IEEE, (2021)Characterization of Data Compression in Datacenters., , , , , , , and . ISPASS, page 1-12. IEEE, (2023)ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learning., , and . MICRO, page 622-636. IEEE, (2020)Algorithm-Hardware Co-Design of Distribution-Aware Logarithmic-Posit Encodings for Efficient DNN Inference., , , , and . CoRR, (2024)Understanding Data Compression in Warehouse-Scale Datacenter Services., , , , , , , and . ISPASS, page 221-223. IEEE, (2022)GEAR: An Efficient KV Cache Compression Recipe for Near-Lossless Generative Inference of LLM., , , , , , and . CoRR, (2024)Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication., , , , , and . IEEE Trans. Parallel Distributed Syst., 33 (4): 1002-1014 (2022)