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Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders.

G. Miñana, J. Hidalgo, J. Lanchares, J. Colmenar, O. Garnica, и S. López. IET Comput. Digit. Tech., 1 (2): 113-119 (2007)

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Hsiao-Mei Juan

Alexander Juan

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María Elena Juan Pardo

Pedro Juan-Tous

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