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13.5 A 0.35-to-2.6GHz multilevel outphasing transmitter with a digital interpolating phase modulator enabling up to 400MHz instantaneous bandwidth.

, , , , , , , , , , and . ISSCC, page 224-225. IEEE, (2017)

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N-path gmC filter modeling and analysis for direct delta-sigma receiver., , , and . NEWCAS, page 277-280. IEEE, (2012)Next-Generation RF Front-End Design Methods for Direct ΔΣ Receivers., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 5 (4): 514-524 (2015)Full-Duplex Wireless Transceiver Self-Interference Cancellation Through FD-SOI Buried-Gate Signaling., , , , , , , and . ISCAS, page 1-5. IEEE, (2018)A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching., , , , , , and . ISCAS, page 1-4. IEEE, (2017)Analysis and Design of N-Path Filter Offset Tuning in a 0.7-2.7-GHz Receiver Front-End., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (1): 234-243 (2015)13.5 A 0.35-to-2.6GHz multilevel outphasing transmitter with a digital interpolating phase modulator enabling up to 400MHz instantaneous bandwidth., , , , , , , , , and 1 other author(s). ISSCC, page 224-225. IEEE, (2017)A common-gate common-source low noise amplifier based RF front end with selective input impedance matching for blocker-resilient receivers., , , , , , and . I. J. Circuit Theory and Applications, 46 (8): 1427-1442 (2018)A wideband blocker-resilient RF front-end with selective input-impedance matching for direct-ΔΣ-receiver architectures., , , , , , and . NORCAS, page 1-4. IEEE, (2016)Design tradeoffs in N-path GmC integrators for direct delta-sigma receivers., , , , , and . ECCTD, page 1-4. IEEE, (2013)A 2.5-GHz 4.2-dB NF direct ΔΣ receiver with a frequency-translating integrator., , , , , , and . ESSCIRC, page 371-374. IEEE, (2014)