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Disambiguation of "Gharibdoust, Kiarash"

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Design and analysis of jitter-aware low-power and high-speed TSV link for 3D ICs.

, , , , and . Microelectron. J., (2016)

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Kiarash Fatehi

Kiarash Narimani

Kiarash Mahdavi

Kiarash Fatehi

Kiarash Karampour

 

Other publications of authors with the same name

Design and Modeling of Serial Data Transceiver Architecture by Employing Multi-Tone Single-Sideband Signaling Scheme., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (12): 3192-3201 (2017)A Digital Spectrum Shaping Signaling Serial-Data Transceiver With Crosstalk and ISI Reduction Property in Multidrop Interfaces., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (12): 1126-1130 (2016)A 4×9 Gb/s 1pJ/b Hybrid NRZ/Multi-Tone I/O With Crosstalk and ISI Reduction for Dense Interconnects., , and . IEEE J. Solid State Circuits, 51 (4): 992-1002 (2016)A Time-Division Multiplexing Signaling Scheme for Inter-Symbol/Channel Interference Reduction in Low-Power Multi-Drop Memory Links., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (12): 1387-1391 (2017)An Orthogonal Pulse Amplitude Modulation Signaling for High-Speed Wireline Communications., and . ISCAS, page 1-5. IEEE, (2023)Short-Reach and Pin-Efficient Interfaces Using Correlated NRZ., , , , , , , , , and 11 other author(s). CICC, page 1-8. IEEE, (2020)A Method for Noise Reduction in Active-RC Circuits., and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (12): 906-910 (2011)A 1.02-pJ/b 20.83-Gb/s/Wire USR Transceiver Using CNRZ-5 in 16-nm FinFET., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 55 (4): 1108-1123 (2020)A 4×9 Gb/s 1 pJ/b NRZ/multi-tone serial-data transceiver with crosstalk reduction architecture for multi-drop memory interfaces in 40nm CMOS., , and . VLSIC, page 180-. IEEE, (2015)10.3 A 7.5mW 7.5Gb/s mixed NRZ/multi-tone serial-data transceiver for multi-drop memory interfaces in 40nm CMOS., , and . ISSCC, page 1-3. IEEE, (2015)