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Disambiguation of "Tabrizchi, Sepehr"

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An energy-based heterogeneity measure for quantifying structural irregularity in complex networks.

, , , and . J. Comput. Sci., (2019)

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Sepehr Meshkinfamfard

Philipp Sepehr

Sepehr Samandari

Mohammad-Hassan Sepehr

Semira Sepehr-Rezai

 

Other publications of authors with the same name

PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (1): 141-150 (January 2024)Comparative Study of Low Bit-width DNN Accelerators: Opportunities and Challenges., , , , and . MWSCAS, page 797-800. IEEE, (2023)TizBin: A Low-Power Image Sensor with Event and Object Detection Using Efficient Processing-in-Pixel Schemes., , and . ICCD, page 770-777. IEEE, (2022)P-PIM: A Parallel Processing-in-DRAM Framework Enabling Row Hammer Protection., , , , and . DATE, page 1-6. IEEE, (2023)Novel CNFET ternary circuit techniques for high-performance and energy-efficient design., , , and . IET Circuits Devices Syst., 13 (2): 193-202 (2019)DIAC: Design Exploration of Intermittent-Aware Computing Realizing Batteryless Systems., , and . CoRR, (2023)A Near-Sensor Processing Accelerator for Approximate Local Binary Pattern Networks., , , and . CoRR, (2022)High performance, variation-tolerant CNFET ternary full adder a process, voltage, and temperature variation-resilient design., , , and . Comput. Electr. Eng., (2019)Deep Mapper: A Multi-Channel Single-Cycle Near-Sensor DNN Accelerator., , , , , , and . ICRC, page 1-5. IEEE, (2023)Method for designing ternary adder cells based on CNFETs., , , , and . IET Circuits Devices Syst., 11 (5): 465-470 (2017)