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Disambiguation of "Shikano, Hiroaki"

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A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture.

, , , , , , , and . Trans. High Perform. Embed. Archit. Compil., (2011)

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Susumu Shikano

Hiroaki Kobayashi

Hiroaki Tanaka

 

Other publications of authors with the same name

Heterogeneous Multi-Core Architecture That Enables 54x AAC-LC Stereo Encoding., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 43 (4): 902-910 (2008)A self-controllable voltage level (SVL) circuit and its low-power high-speed CMOS circuit applications., , and . IEEE J. Solid State Circuits, 38 (7): 1220-1226 (2003)Software-cooperative power-efficient heterogeneous multi-core for media processing., , , , , , , , , and 1 other author(s). ASP-DAC, page 736-741. IEEE, (2008)Study on supporting technology for operational procedure design of IT systems in cloud-era datacenters., , , , , and . SAC, page 405-407. ACM, (2013)Clock Driver Design for Low-Power High-Speed 90-nm CMOS Register Array., , , and . IEICE Trans. Electron., 91-C (4): 553-561 (2008)Power-Aware Compiler Controllable Chip Multiprocessor., , , , and . IEICE Trans. Electron., 91-C (4): 432-439 (2008)Power-Aware Compiler Controllable Chip Multiprocessor., , , , and . PACT, page 427. IEEE Computer Society, (2007)A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor Architecture., , , , , , , and . Trans. High Perform. Embed. Archit. Compil., (2011)QoS Analysis on Cable Video Delivery Networks., , , , , , , and . DCNET, page 85-92. SciTePress, (2017)Compiler Control Power Saving Scheme for Multi Core Processors., , , , , and . LCPC, volume 4339 of Lecture Notes in Computer Science, page 362-376. Springer, (2005)