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An integrated approach to accelerate data and predicate computations in hyperblocks.

, , and . MICRO, page 101-111. ACM/IEEE Computer Society, (2000)

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Lower bounds on precedence-constrained scheduling for parallel processors., , and . Inf. Process. Lett., 83 (1): 27-32 (2002)Impact of Load Imbalance on the Design of Software Barriers., and . ICPP (2), page 63-72. CRC Press, (1995)Minimizing Register Requirements of a Modulo Schedule via Optimum Stage Scheduling., , and . Int. J. Parallel Program., 24 (2): 103-132 (1996)Optimum Modulo Schedules for Minimum Register Requirements., , and . International Conference on Supercomputing, page 31-40. ACM, (1995)Algorithms for Total Weighted Completion Time Scheduling., , and . SODA, page 852-853. ACM/SIAM, (1999)Register allocation for predicated code., and . MICRO, page 180-191. ACM / IEEE Computer Society, (1995)Effective Cluster Assignment for Modulo Scheduling., and . MICRO, page 103-114. ACM/IEEE Computer Society, (1998)Balance Scheduling: Weighting Branch Tradeoffs in Superblocks., and . MICRO, page 272-283. ACM/IEEE Computer Society, (1999)Coordinating GPU threads for OpenMP 4.0 in LLVM., , , , , , , and . LLVM@SC, page 12-21. IEEE Computer Society, (2014)An integrated simdization framework using virtual vectors., , , and . ICS, page 169-178. ACM, (2005)