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Comparative Performance Evaluation of Cache-Coherent NUMA and COMA Architectures.

, , and . ISCA, page 80-91. ACM, (1992)

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A compiler algorithm that reduces read latency in ownership-based cache coherence protocols., and . PACT, page 69-78. IFIP Working Group on Algol / ACM, (1995)Coordinated Management of DVFS and Cache Partitioning under QoS Constraints to Save Energy in Multi-Core Systems., , , and . CoRR, (2019)High-Performance Embedded Architecture and Compilation Roadmap., , , , , , , , , and 1 other author(s). Trans. High Perform. Embed. Archit. Compil., (2007)Enhancing Last-Level Cache Performance by Block Bypassing and Early Miss Determination., and . Asia-Pacific Computer Systems Architecture Conference, volume 4186 of Lecture Notes in Computer Science, page 52-66. Springer, (2006)LV*: A low complexity lazy versioning HTM infrastructure., , and . ICSAMOS, page 231-240. IEEE, (2010)Reducing the Read-Miss Penalty for Flat COMA Protocols., , and . Comput. J., 40 (4): 208-219 (1997)A Survey of Cache Coherence Schemes for Multiprocessors.. Computer, 23 (6): 12-24 (1990)Starvation-free commit arbitration policies for transactional memory systems., and . SIGARCH Comput. Archit. News, 35 (1): 39-46 (2007)Improving power efficiency of D-NUCA caches., , , , and . SIGARCH Comput. Archit. News, 35 (4): 53-58 (2007)DELTA: Distributed Locality-Aware Cache Partitioning for Tile-based Chip Multiprocessors., , , and . IPDPS, page 578-589. IEEE, (2020)