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Disambiguation of "Venkateswaran, Natesan"

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Sharing and Re-use of Statistical Timing Macro-Models across Multiple Voltage Domains.

, , , , , , and . VLSID, page 493-498. IEEE Computer Society, (2016)

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Lavanya Natesan

Vijay Venkateswaran

Venkateswaran Ganesh

Jayendran Venkateswaran

 

Other publications of authors with the same name

Criticality computation in parameterized statistical timing., , , and . DAC, page 63-68. ACM, (2006)Reversible statistical max/min operation: concept and applications to timing., , , , and . DAC, page 1067-1073. ACM, (2012)Congestion Mitigation During Placement., and . Great Lakes Symposium on VLSI, page 228-229. IEEE Computer Society, (1999)Optimization objectives and models of variation for statistical gate sizing., , , , and . ACM Great Lakes Symposium on VLSI, page 313-316. ACM, (2005)Gate sizing using incremental parameterized statistical timing analysis., , , and . ICCAD, page 1029-1036. IEEE Computer Society, (2005)A distributed timing analysis framework for large designs., , , , and . DAC, page 116:1-116:6. ACM, (2016)A constructive method for data path area estimation during high-level VLSI synthesis., , , , and . ASP-DAC, page 509-515. IEEE, (1997)Clock-skew constrained placement for row based designs., and . ICCD, page 219-220. IEEE Computer Society, (1998)Clock-Skew Constrained Cell Placement., and . VLSI Design, page 146-149. IEEE Computer Society, (1996)Timing analysis with nonseparable statistical and deterministic variations., , , , , , , and . DAC, page 1061-1066. ACM, (2012)