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Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution., , , and . MICRO, page 43-54. IEEE Computer Society, (2005)Prefetch-Aware DRAM Controllers., , , and . MICRO, page 200-209. IEEE Computer Society, (2008)Linearly compressed pages: a low-complexity, low-latency main memory compression framework., , , , , , , and . MICRO, page 172-184. ACM, (2013)The application slowdown model: quantifying and controlling the impact of inter-application interference at shared caches and main memory., , , , and . MICRO, page 62-75. ACM, (2015)Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning., , , , , and . MICRO, page 1121-1137. ACM, (2021)Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction., , , , , , and . MICRO, page 1-18. IEEE, (2022)DeepSketch: A New Machine Learning-Based Reference Search Technique for Post-Deduplication Delta Compression., , , , and . FAST, page 247-264. USENIX Association, (2022)Evaluating Homomorphic Operations on a Real-World Processing-In-Memory System., , , , and . IISWC, page 211-215. IEEE, (2023)Techniques for Efficient Processing in Runahead Execution Engines., , and . ISCA, page 370-381. IEEE Computer Society, (2005)CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off., , , , , , , and . ISCA, page 666-679. IEEE, (2020)