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A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications.

, , , , , and . Sensors, 21 (19): 6591 (2021)

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An efficient two-dimensional inverse discrete cosine transform algorithm for HDTV receivers., , and . IEEE Trans. Circuits Syst. Video Techn., 5 (1): 25-30 (1995)VLSI implementation of parallel coefficient-by-coefficient two-dimensional IDCT processor., , , and . IEEE Trans. Circuits Syst. Video Techn., 5 (5): 396-406 (1995)A High-Performance Videotext Detection Algorithm., and . IIH-MSP, page 242-245. IEEE, (2012)A fast rate-distortion optimization algorithm for H.264/AVC codec., , and . Signal Image Video Process., 7 (5): 939-949 (2013)The Image Shape Recovery on Communication Data Lost Damage., , and . ICUFN, page 206-210. IEEE, (2019)A single chip for 4-channel LED dimming driver of 240 W true color display with SPI control., , and . Microelectron. J., (2018)FHI-Unet: Faster Heterogeneous Images Semantic Segmentation Design and Edge AI Implementation for Visible and Thermal Images Processing., , , , , and . IEEE Access, (2022)Intercross scanning control with double driver for micro-LED display., , and . Displays, (2021)VLSI Implementation of High-Performance Error Concealment Processor for TV Broadcasting., and . IEEE Trans. Circuits Syst. Video Techn., 17 (8): 1054-1064 (2007)A New 6-bit Flash A/D Converter Using Novel Two-Step Structure., and . DDECS, page 103-107. IEEE Computer Society, (2006)