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Disambiguation of "Taubin, Alexander"

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Quasi-static Scheduling for Concurrent Architectures.

, , , , and . Fundam. Informaticae, 62 (2): 171-196 (2004)

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Alexander

Alexander Auch

A phylogenetic potpourri: computational methods for analysing genome scale data. Uni Tübingen, (2010)

Alexander Stadler

Messtechnische Bestimmung und Simulation der Kernverluste in weichmagnetischen Materialien. Uni Erlangen-Nürnberg, (2009)

Alexander Gocht

Methods in economic farm modelling. Uni Bonn, (2009)

Alexander Blecken

A reference task model for supply chain processes of humanitarian organisations. Uni Paderborn, (2009)
 

Other publications of authors with the same name

Formal method for self-timed design., , and . EURO-DAC, page 197-201. EEE Computer Society, (1991)Elastic Circuits., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (10): 1437-1455 (2009)The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems., , , , and . Journal of Circuits, Systems, and Computers, 8 (1): 67-118 (1998)A Structural Approach for the Analysis of Petri Nets by Reduced Unfoldings., , , and . Application and Theory of Petri Nets, volume 1091 of Lecture Notes in Computer Science, page 346-365. Springer, (1996)Checking Delay-Insensitivity: 104 Gates and Beyond., , , , and . ASYNC, page 149-157. IEEE Computer Society, (2002)Lazy transition systems: application to timing optimization of asynchronous circuits., , , , , and . ICCAD, page 324-331. ACM / IEEE Computer Society, (1998)Delay Insensitive Encoding and Power Analysis: A Balancing Act., , , , , and . ASYNC, page 116-125. IEEE Computer Society, (2005)Specification and analysis of self-timed circuits., , and . VLSI Signal Processing, 7 (1-2): 117-135 (1994)Change Diagram : A behavioural model for very speed VLSI circuit/highly parallel systems., , , , and . PDP, page 220-226. IEEE, (1994)Partial-scan delay fault testing of asynchronous circuits., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (11): 1184-1199 (1998)