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A Discrete-Time Battery Model for High-Level Power Estimation.

, , , , , and . DATE, page 35-39. IEEE Computer Society / ACM, (2000)

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A hierarchical multi-level test generation system., and . Great Lakes Symposium on VLSI, page 54-59. IEEE, (1991)Energy-performance tradeoffs for the shared memory in multi-processor systems-on-chip., , and . ISCAS (2), page 361-364. IEEE, (2004)Pass-XNOR logic: A new logic style for P-N junction based graphene circuits., , , and . DATE, page 1-4. European Design and Automation Association, (2014)Telescopic Units: Increasing the Average Throughput of Pipelined Designs by Adaptive Latency Control., , and . DAC, page 22-27. ACM Press, (1997)Kernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms., , , , and . DAC, page 247-252. ACM Press, (1999)Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques., , , , and . DAC, page 467-470. ACM Press, (1996)Energy-Efficient Value-Based Selective Refresh for Embedded DRAMs., , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 466-476. Springer, (2005)Workload-driven frequency-aware battery sizing., , and . ISLPED, page 1-6. IEEE, (2017)Post-placement temperature reduction techniques., , , , and . DATE, page 634-637. IEEE Computer Society, (2010)A State Space Decomposition Algorithm for Approximate FSM Traversal., , , , and . EDAC-ETC-EUROASIC, page 137-141. IEEE Computer Society, (1994)