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Disambiguation of "Luong, Howard C."

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Transformer-based varactor-less 96GHz-110GHz VCO and 89GHz-101GHz QVCO in 65nm CMOS.

, , , and . A-SSCC, page 357-360. IEEE, (2016)

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Luong Quy Cuong

Luong Quy Cuong

Phuong Minh Luong

Phuc-Hiep Luong

Howard Nelson

 

Other publications of authors with the same name

A 28-MHz wideband switched-capacitor bandpass filter with transmission zeros for high attenuation., , and . IEEE J. Solid State Circuits, 40 (3): 785-790 (2005)A 1.5-V CMOS Receiver Front-End for 9-Band MB-OFDM UWB System., , and . CICC, page 801-804. IEEE, (2006)A 0.9-V Double-Balanced Quadrature-Input Quadrature-Output Frequency Divider., and . CICC, page 37-40. IEEE, (2006)V-band varactor-less interpolative-phase-tuning oscillators with multiphase outputs., and . CICC, page 1-4. IEEE, (2010)A 0.05-to-10GHz 19-to-22GHz and 38-to-44GHz SDR frequency synthesizer in 0.13μm CMOS., and . ISSCC, page 464-466. IEEE, (2011)0.9mW 7GHz and 1.6mW 60GHz frequency dividers with locking-range enhancement in 0.13µm CMOS., , and . ISSCC, page 96-97. IEEE, (2009)Analysis and Design of Magnetically Tuned W -Band Oscillators., and . IEEE Trans. Very Large Scale Integr. Syst., 30 (6): 732-743 (2022)A 1.5-V 4-GHz dynamic-loading regenerative frequency doubler in a 0.35-μm CMOS process., and . IEEE Trans. Circuits Syst. II Express Briefs, 50 (8): 450-455 (2003)A Spur-and-Phase-Noise-Filtering Technique for Inductor-Less Fractional-N Injection-Locked PLLs., , , , and . IEEE J. Solid State Circuits, 52 (8): 2128-2140 (2017)An 82-107.6-GHz Integer-N ADPLL Employing a DCO With Split Transformer and Dual-Path Switched-Capacitor Ladder and a Clock-Skew-Sampling Delta-Sigma TDC., and . IEEE J. Solid State Circuits, 54 (2): 358-367 (2019)