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Delay Modeling for Power Noise and Temperature-Aware Design and Test of Digital Systems., , , , , и . J. Low Power Electron., 4 (3): 385-391 (2008)Merging a DSP-Oriented Signal Integrity Technique and SW-Based Fault Handling Mechanisms to Ensure Reliable DSP Systems., , , , и . J. Electron. Test., 20 (4): 397-411 (2004)Orienting Redundancy and HW/SW Codesign Techniques Towards Speech Recognition Systems., , и . LATW, стр. 226-233. IEEE, (2001)Towards a transmission power self-optimization in reliable Wireless Sensor Networks., , , , , и . LATW, стр. 1-3. IEEE, (2010)Impact of Power Supply Voltage Variations on FPGA-Based Digital Systems Performance., , , , , , , и . J. Low Power Electron., 6 (2): 339-349 (2010)Evaluating a Hardware-Based Approach for Detecting Resistive-Open Defects in SRAMs., , , , и . VLSID, стр. 405-410. IEEE Computer Society, (2015)Run-time Hardware Reconfiguration of Functional Units to Support Mixed-Critical Applications., , , , и . LATS, стр. 1-6. IEEE, (2020)Aging monitoring with local sensors in FPGA-based designs., , , , , , , , и . FPL, стр. 1-4. IEEE, (2013)Modeling and Simulation of Time Domain Faults in Digital Systems., , , , и . IOLTS, стр. 5-10. IEEE Computer Society, (2004)An intellectual property core to detect task schedulling-related faults in RTOS-based embedded systems., , и . IOLTS, стр. 19-24. IEEE Computer Society, (2011)