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Disambiguation of "Huthmann, Jens"

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Extending High-Level Synthesis with High-Performance Computing Performance Visualization.

, , , , and . CLUSTER, page 371-380. IEEE, (2020)

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Cornelia Huthmann

Adolf Huthmann

Petra Huthmann

Stefanie Huthmann

Eva Huthmann

 

Other publications of authors with the same name

Extending High-Level Synthesis with High-Performance Computing Performance Visualization., , , , and . CLUSTER, page 371-380. IEEE, (2020)RAP: More Efficient Memory Access in Highly Speculative Execution on Reconfigurable Adaptive Computers., , , and . ReConFig, page 434-441. IEEE Computer Society, (2011)White Paper from Workshop on Large-scale Parallel Numerical Computing Technology (LSPANC 2020): HPC and Computer Arithmetic toward Minimal-Precision Computing., , , , , , , , , and 8 other author(s). CoRR, (2020)Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers., , and . ACM Trans. Reconfigurable Technol. Syst., 5 (3): 13:1-13:14 (2012)Optimized high-level synthesis of SMT multi-threaded hardware accelerators., and . FPT, page 176-183. IEEE, (2015)OpenMP Device Offloading to FPGAs Using the Nymble Infrastructure., , , , and . IWOMP, volume 12295 of Lecture Notes in Computer Science, page 265-279. Springer, (2020)Scaling Performance for N-Body Stream Computation with a Ring of FPGAs., , , , and . HEART, page 10:1-10:6. ACM, (2019)Evaluation of speculative execution techniques for high-level language to hardware compilation., , and . ReCoSoC, page 1-8. IEEE, (2011)Automatic high-level synthesis of multi-threaded hardware accelerators., , and . FPL, page 1-4. IEEE, (2014)An Execution Model and High-Level-Synthesis System for Generating SIMT Multi-Threaded Hardware from C Source Code.. Darmstadt University of Technology, Germany, (2017)