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Disambiguation of "Mathew, Deepak M."

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A Platform to Analyze DDR3 DRAM's Power and Retention Time.

, , , , and . IEEE Des. Test, 34 (4): 52-59 (2017)

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Deepak Ajwani

Deepak Bararia

Deepak Jain

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Deepak Mathaikutty

 

Other publications of authors with the same name

A Platform to Analyze DDR3 DRAM's Power and Retention Time., , , , and . IEEE Des. Test, 34 (4): 52-59 (2017)Advanced heterogeneous memory subsystems for energy-constrained computing = Fortgeschrittene heterogene Speichersubsysteme für Computersysteme mit limitiertem Energieverbrauch.. Kaiserslautern University of Technology, Germany, (2021)A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing., , , , , and . SAMOS, volume 11733 of Lecture Notes in Computer Science, page 429-441. Springer, (2019)Improving the error behavior of DRAM by exploiting its Z-channel property., , , , , and . DATE, page 1492-1495. IEEE, (2018)RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM., , , , , , , and . SAMOS, volume 11733 of Lecture Notes in Computer Science, page 34-47. Springer, (2019)Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling., , , , , and . IEEE Access, (2021)An analysis on retention error behavior and power consumption of recent DDR4 DRAMs., , , , , , and . DATE, page 293-296. IEEE, (2018)An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices., , , , , , and . MEMSYS, page 114-125. ACM, (2020)Efficient coding scheme for DDR4 memory subsystems., , , , , , and . MEMSYS, page 148-157. ACM, (2018)