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Harnessing Numerical Flexibility for Deep Learning on FPGAs.

A. Ling, M. Abdelfattah, S. O'Connell, A. Bitar, D. Han, R. DiCecco, S. Subhaschandra, C. Johnson, D. Denisenko, J. Fender, and G. Chiu. HEART, page 1:1-1:3. ACM, (2018)

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Suchit Prasad Shrestha

Other publications of authors with the same name

A Reconfigurable Computing System Based on a Cache-Coherent Fabric.N. Oliver, R. Sharma, S. Chang, B. Chitlur, E. Garcia, J. Grecco, A. Grier, N. Ijih, Y. Liu, P. Marolia and 5 other author(s). ReConFig, page 80-85. IEEE Computer Society, (2011)QuickIA: Exploring heterogeneous architectures on real prototypes.N. Chitlur, G. Srinivasa, S. Hahn, P. Gupta, D. Reddy, D. Koufaty, P. Brett, A. Prabhakaran, L. Zhao, N. Ijih and 4 other author(s). HPCA, page 433-440. IEEE Computer Society, (2012)A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study.D. Moss, K. Srivatsan, E. Nurvitadhi, P. Ratuszniak, C. Johnson, J. Sim, A. Mishra, D. Marr, S. Subhaschandra, and P. Leong. FPGA, page 107-116. ACM, (2018)Customizable FPGA OpenCL matrix multiply design template for deep neural networks.J. Yinger, E. Nurvitadhi, D. Capalija, A. Ling, D. Marr, K. Srivatsan, D. Moss, and S. Subhaschandra. FPT, page 259-262. IEEE, (2017)SWiF: A Simplified Workload-Centric Framework for FPGA-Based Computing.D. Ojika, P. Majcher, W. Neubauer, S. Subhaschandra, and D. Acosta. FCCM, page 26. IEEE Computer Society, (2017)Harnessing Numerical Flexibility for Deep Learning on FPGAs.A. Ling, M. Abdelfattah, S. O'Connell, A. Bitar, D. Han, R. DiCecco, S. Subhaschandra, C. Johnson, D. Denisenko, J. Fender and 1 other author(s). HEART, page 1:1-1:3. ACM, (2018)High performance binary neural networks on the Xeon+FPGA™ platform.D. Moss, E. Nurvitadhi, J. Sim, A. Mishra, D. Marr, S. Subhaschandra, and P. Leong. FPL, page 1-4. IEEE, (2017)

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Disambiguation of "Subhaschandra, Suchit"

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Harnessing Numerical Flexibility for Deep Learning on FPGAs.

Please choose a person to relate this publication to

Suchit Prasad Shrestha

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Disambiguation of "Subhaschandra, Suchit"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Harnessing Numerical Flexibility for Deep Learning on FPGAs.

Please choose a person to relate this publication to

Suchit Prasad Shrestha

Other publications of authors with the same name

Disambiguation

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URL
DOI
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APA
Chicago
DIN 1505
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Harnessing Numerical Flexibility for Deep Learning on FPGAs.