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Disambiguation of "Pan, Chenyun"

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A Technology/Circuit Co-design Framework for Emerging Reconfigurable Devices.

, , , , and . MWSCAS, page 1123-1127. IEEE, (2023)

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Weiqing Pan

Yaling Pan

Pan Li

Alexey Pan

Xiaoqing Pan

 

Other publications of authors with the same name

Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect., , , , , , and . ACM Great Lakes Symposium on VLSI, page 159-162. ACM, (2023)Technology/circuit co-optimization and benchmarking for graphene interconnects at Sub-10nm technology node., , , , and . ISQED, page 599-603. IEEE, (2015)Towards Area Efficient Logic Circuit: Exploring Potential of Reconfigurable Gate by Generic Exact Synthesis., , and . IEEE Open J. Comput. Soc., (2023)An analytical approach to system-level variation analysis and optimization for multi-core processor., , and . ISQED, page 99-106. IEEE, (2014)Deep learning in physical layer communications: Evolution and prospects in 5G and 6G networks., , , , and . IET Commun., 17 (16): 1863-1876 (October 2023)A Fast System-Level Design Methodology for Heterogeneous Multi-Core Processors Using Emerging Technologies., and . IEEE J. Emerg. Sel. Topics Circuits Syst., 5 (1): 75-87 (2015)Beyond-CMOS non-Boolean logic benchmarking: Insights and future directions., and . DATE, page 133-138. IEEE, (2017)A mixed signal architecture for convolutional neural networks., , , , , , and . CoRR, (2018)QPUF: Quantum Physical Unclonable Functions for Security-by-Design of Industrial Internet-of-Things., , , and . iSES, page 296-301. IEEE, (2023)Emerging Interconnect Exploration for SRAM Application Using Nonconventional H-Tree and Center-Pin Access., , , , , , , and . ISQED, page 1. IEEE, (2023)