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Multi-context non-volatile content addressable memory using magnetic tunnel junctions.

, , , and . NANOARCH, page 103-108. ACM, (2016)

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Multi-context non-volatile content addressable memory using magnetic tunnel junctions., , , and . NANOARCH, page 103-108. ACM, (2016)A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (4): 1454-1464 (2019)A Reconfigurable Arbiter PUF Based on STT-MRAM., , , , , , and . ISCAS, page 1-5. IEEE, (2021)Synchronous full-adder based on complementary resistive switching memory cells., , , , , , , , , and 3 other author(s). NEWCAS, page 1-4. IEEE, (2013)A Novel Multi-Context Non-Volatile Content-Addressable Memory Cell and Multi-Level Architecture for High Reliability and Density., , , , , and . NVMSA, page 1-6. IEEE, (2021)Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory., , , , , , , , , and 1 other author(s). ISCAS, page 1-5. IEEE, (2021)Robust magnetic full-adder with voltage sensing 2T/2MTJ cell., , , , , , and . NANOARCH, page 27-32. IEEE Computer Society, (2015)Spin-Orbit Torque Nonvolatile Flip-Flop Designs., , , , , and . ISCAS, page 1-5. IEEE, (2021)HSC: A Hybrid Spin/CMOS Logic Based In-Memory Engine with Area-Efficient Mapping Strategy., , , , , and . ISCAS, page 1-5. IEEE, (2021)High-Density and Fast-Configuration Non-Volatile Look-Up Table Based on NAND-Like Spintronic Memory., , , , , and . APCCAS, page 382-385. IEEE, (2018)