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A Task-Centric Memory Model for Scalable Accelerator Architectures., , , , and . IEEE Micro, 30 (1): 29-39 (2010)Fetch-Criticality Reduction through Control Independence., , , and . ISCA, page 13-24. IEEE Computer Society, (2008)Emµcode: Masking hard faults in complex functional units., , and . DSN, page 458-467. IEEE Computer Society, (2009)A Hybrid Shared Memory/Message Passing Parallel Machine., and . ICPP (1), page 232-236. CRC Press, (1993)SPARTAN: A software tool for Parallelization Bottleneck Analysis., and . IWMSE@ICSE, page 56-63. IEEE Computer Society, (2009)A Task-Centric Memory Model for Scalable Accelerator Architectures., , , , and . PACT, page 77-87. IEEE Computer Society, (2009)FlexCache: A Framework for Flexible Compiler Generated Data Caching., , and . Intelligent Memory Systems, volume 2107 of Lecture Notes in Computer Science, page 135-146. Springer, (2000)Implications of I/O for Gang Scheduled Workloads., , , , and . JSSPP, volume 1291 of Lecture Notes in Computer Science, page 215-237. Springer, (1997)Exploiting Postdominance for Speculative Parallelization., , , , and . HPCA, page 295-305. IEEE Computer Society, (2007)Address-Indexed Memory Disambiguation and Store-to-Load Forwarding., , and . MICRO, page 171-182. IEEE Computer Society, (2005)