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Prioritised ceteris paribus logic for counterfactual reasoning., and . Synthese, 195 (4): 1681-1703 (2018)Validation d'une approche " basée sur exemples " pour l'apprentissage de la programmation., , and . IHM, volume 264 of ACM International Conference Proceeding Series, page 147-154. ACM, (2005)Example-based programming: a pertinent visual approach for learning to program., , and . AVI, page 358-361. ACM Press, (2004)Towards approximation during test of Integrated Circuits., , , , , and . DDECS, page 28-33. IEEE, (2017)An Efficient BIST Architecture for Delay Faults in the Logic Cells of Symmetrical SRAM-Based FPGAs., , , and . J. Electron. Test., 22 (2): 161-172 (2006)An advanced diagnostic method for delay faults in combinational faulty circuits., , and . J. Electron. Test., 6 (3): 277-294 (1995)A Layout-Aware Pattern Grading Procedure for Critical Paths Considering Power Supply Noise and Crosstalk., , and . J. Electron. Test., 28 (2): 201-214 (2012)Everything Else Being Equal: A Modal Logic for Ceteris Paribus Preferences., , and . J. Philosophical Logic, 38 (1): 83-125 (2009)Design of a Sextuple Cross-Coupled SRAM Cell with Optimized Access Operations for Highly Reliable Terrestrial Applications., , , , , , , and . ATS, page 55-60. IEEE, (2019)Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity., , , , , , , and . ISCAS (1), page 110-113. IEEE, (1999)