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Disambiguation of "Morimura, Hiroki"

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1-cm3 event-driven wireless sensor nodes.

, , , , and . ICCS, page 6-10. IEEE, (2012)

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Hiroki Takahashi

Hiroki Kawamura

Hiroki Sumizawa

 

Other publications of authors with the same name

A 1-V, 10-MHz, 3.5-mW, 1-Mb MTCMOS SRAM: with charge-recycling input/output buffers., , and . IEEE J. Solid State Circuits, 34 (6): 866-877 (1999)Ultra-low-power circuit techniques for mm-size wireless sensor nodes with energy harvesting., , , , and . IEICE Electron. Express, 11 (20): 20142009 (2014)Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSI., , , , , , , and . IEICE Trans. Electron., 90-C (10): 1892-1899 (2007)Pixel-Parallel Image-Matching Circuit Schemes for a Single-Chip Fingerprint Sensor and Identifier., , , , and . IEICE Trans. Electron., 88-C (5): 1070-1078 (2005)A 0.90-4.39-V Detection Voltage Range, 56-Level Programmable Voltage Detector Using Fine Voltage-Step Subtraction for Battery Management., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (3): 1270-1279 (2019)Nano-watt power management and vibration sensing on a dust-size batteryless sensor node for ambient intelligence applications., , , , , , , and . ISSCC, page 504-505. IEEE, (2010)248pW, 0.11mV/°C glitch-free programmable voltage detector with multiple voltage duplicator for energy harvesting., , , , , and . ESSCIRC, page 249-252. IEEE, (2015)1-cm3 event-driven wireless sensor nodes., , , , and . ICCS, page 6-10. IEEE, (2012)56-Level programmable voltage detector in steps of 50mV for battery management., , , , and . A-SSCC, page 49-52. IEEE, (2016)A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit configurable macrocells., , and . ISLPED, page 12-17. ACM, (1999)