( en | de | ru )

 

Disambiguation of "Ghosh, Indradeep"

Author of the publication

copydeleteadd this publication to your clipboard
Ising-Based Louvain Method: Clustering Large Graphs with Specialized Hardware.

, , , and . CoRR, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Michael Ghosh

Subhajit Ghosh

Arabinda Ghosh

Arabinda Ghosh

Rajat Ghosh

 

Other publications of authors with the same name

A BIST scheme for RTL circuits based on symbolic testabilityanalysis., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (1): 111-128 (2000)A low overhead design for testability and test generation technique for core-based systems-on-a-chip., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (11): 1661-1676 (1999)KLOVER: Automatic Test Generation for C and C Programs, Using Symbolic Execution., , , , , , , and . IEEE Softw., 34 (5): 30-37 (2017)VLSI Implementation of An Efficient ASIC Architecture for Real-Time Rotation of Digital Images., and . IJPRAI, 9 (2): 449-462 (1995)SymJS: automatic symbolic testing of JavaScript web applications., , and . SIGSOFT FSE, page 449-459. ACM, (2014)Ising-Based Louvain Method: Clustering Large Graphs with Specialized Hardware., , , and . IDA, volume 12695 of Lecture Notes in Computer Science, page 350-361. Springer, (2021)High Level Test Generation for Custom Hardware: An Industrial Perspective.. Asian Test Symposium, page 458. IEEE Computer Society, (2005)Automatic test pattern generation for functional RTL circuits using assignment decision diagrams., and . DAC, page 43-48. ACM, (2000)A Fast and Low Cost Testing Technique for Core-Based System-on-Chip., , and . DAC, page 542-547. ACM Press, (1998)Automatic test pattern generation for functional register-transferlevel circuits using assignment decision diagrams., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (3): 402-415 (2001)