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A heuristic machine learning-based algorithm for power and thermal management of heterogeneous MPSoCs., , , и . ISLPED, стр. 291-296. IEEE, (2015)A Timing Uncertainty-Aware Clock Tree Topology Generation Algorithm for Single Flux Quantum Circuits., , и . DATE, стр. 278-281. IEEE, (2020)A Hyper-Parameter Based Margin Calculation Algorithm for Single Flux Quantum Logic Cells., и . ISVLSI, стр. 645-650. IEEE, (2019)TDP-ADMM: A Timing Driven Placement Approach for Superconductive Electronic Circuits Using Alternating Direction Method of Multipliers., и . DAC, стр. 1-6. IEEE, (2020)NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic., , , , , и . FCCM, стр. 266-267. IEEE, (2021)Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis., , , и . ACM Trans. Reconfigurable Technol. Syst., 16 (2): 17:1-17:25 (июня 2023)A placement algorithm for superconducting logic circuits based on cell grouping and super-cell placement., , и . DATE, стр. 1465-1468. IEEE, (2018)A thermally-aware energy minimization methodology for global interconnects., , , и . DATE, стр. 1213-1218. IEEE, (2017)Accurate margin calculation for single flux quantum logic cells., , и . DATE, стр. 509-514. IEEE, (2018)Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis., , , и . CoRR, (2022)