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WRPN: Training and Inference using Wide Reduced-Precision Networks., , , and . CoRR, (2017)WRPN: Wide Reduced-Precision Networks., , , and . ICLR (Poster), OpenReview.net, (2018)Mapping computation kernels to clustered programmable-reconfigurable processors., , , and . FPT, page 435-438. IEEE, (2003)In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC(Abstract Only)., , , , , , , , , and 1 other author(s). FPGA, page 287. ACM, (2018)WRPN: Wide Reduced-Precision Networks., , , and . CoRR, (2017)In-Package Domain-Specific ASICs for Intel® Stratix® 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC., , , , , , , , , and 1 other author(s). FPL, page 106-110. IEEE Computer Society, (2018)Exploiting Pipelining to Tolerate Wire Delays in a Programmable-Reconfigurable Processor., , , , and . FPL, page 57-64. IEEE, (2005)Characterizing and optimizing the memory footprint of de novo short read DNA sequence assembly., and . ISPASS, page 143-152. IEEE Computer Society, (2009)A reconfigurable unit for a clustered programmable-reconfigurable processor., , , , and . FPGA, page 200-209. ACM, (2004)Blueshift: Designing processors for timing speculation from the ground up., , , , , , and . HPCA, page 213-224. IEEE Computer Society, (2009)