Author of the publication

High-efficiency control structure for CMOS flash memory charge pumps.

, , , and . ISCAS (1), page 121-124. IEEE, (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

4-Mb MOSFET-selected phase-change memory experimental chip., , , , , , , , , and 6 other author(s). ESSCIRC, page 207-210. IEEE, (2004)An Error Control Code Scheme for Multilevel Flash Memories., , , and . MTDT, page 45-50. IEEE Computer Society, (2001)High input range sense comparator for multilevel Flash memories., , , , and . ISCAS (2), page 657-660. IEEE, (2004)A fully symmetrical sense amplifier for non-volatile memories., , , , and . ISCAS (2), page 625-608. IEEE, (2004)Stand-by low-power architecture in a 3 V-only 2-bit/cell 64-Mbit flash memory., , , and . ICECS, page 929-932. IEEE, (2001)Program word-line voltage generator for multilevel flash memories., , , , and . ICECS, page 1030-1033. IEEE, (2000)Low Output Resistance Charge Pump for Flash Memory Programming., , , , and . MTDT, page 99-. IEEE Computer Society, (2001)High-efficiency control structure for CMOS flash memory charge pumps., , , and . ISCAS (1), page 121-124. IEEE, (2005)High-speed low-power sense comparator for multilevel flash memories., , , , and . ICECS, page 759-762. IEEE, (2000)Fast Voltage Regulator for Multilevel Flash Memories., , , and . MTDT, page 34-38. IEEE Computer Society, (2000)