Author of the publication

A Low-Ripple Resistor-Less Hybrid Loop Filter based PLL in 3nm FinFET.

, , , , and . ISCAS, page 1714-1718. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Pandita, Bupesh
add a person with the name Pandita, Bupesh
 

Other publications of authors with the same name