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Disambiguation of "Adham, Saman"

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A novel DFT architecture for 3DIC test, diagnosis and repair.

, , , , , , and . VLSI-DAT, page 1-4. IEEE, (2014)

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Barmak Adhami

Mahin Adhami

Ibrahim Adham

Adham Osseiran

Saman Barghi

 

Other publications of authors with the same name

BIST Fault Diagnosis in Scan-Based VLSI Environments., and . ITC, page 48-57. IEEE Computer Society, (1996)Linking Diagnostic Software to Hardware Self Test in Telecom Systems., , and . ITC, page 986-993. IEEE Computer Society, (1995)Improved Core Isolation and Access for Hierarchical Embedded Test., , and . IEEE Des. Test Comput., 26 (1): 18-25 (2009)15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion Schemes., , , , , , , , , and 16 other author(s). ISSCC, page 292-294. IEEE, (2024)The importance of DFX, a foundry perspective., , , , and . ITC, page 1-6. IEEE Computer Society, (2014)Test Reuse at System Level., , , , and . VTS, page 318-319. IEEE Computer Society, (1998)A BIST Algorithm for Bit/Group Write Enable Faults in SRAMs., and . MTDT, page 98-101. IEEE Computer Society, (2004)A 1 Tbit/s Bandwidth 1024 b PLL/DLL-Less eDRAM PHY Using 0.3 V 0.105 mW/Gbps Low-Swing IO for CoWoS Application., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 49 (4): 1063-1074 (2014)34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell., , , , , , , , , and 13 other author(s). ISSCC, page 572-574. IEEE, (2024)Comparing defect coverage for current-mode logic and CMOS VLSI cells., , , and . ICECS, page 429-432. IEEE, (2000)