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The >S<puter: Introducing a Novel Concept for Dispatching Instructions Using Reconfigurable Hardware.

, and . FPL, volume 1482 of Lecture Notes in Computer Science, page 510-514. Springer, (1998)

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Universal Configurable Machine (UCM): Reconfigurable Computing, basierend auf grobkörnigen Blockstrukturen., and . ARCS Workshops, page 17-26. Universität Jena, Institut für Informatik, (1999)Reliable event-triggered systems for mechatronic applications., , , and . J. Syst. Softw., 77 (1): 17-26 (2005)C to Cellular Automata and Execution on CPU, GPU and FPGA., and . J. Cell. Autom., 11 (1): 7-20 (2016)A Processor Architecture for Executing Global Cellular Automata as Software., and . PARCO, volume 36 of Advances in Parallel Computing, page 711-720. IOS Press, (2019)Reconfigurable RISC - A New Approach for Space-Efficient Superscalar Microprocessor Architecture., and . ARCS, volume 2299 of Lecture Notes in Computer Science, page 165-178. Springer, (2002)Der>S<puter: Ein dynamisch rekonfigurierbares Mikroarchitekturmodell zur Erreichung des maximalen Instruktionsparallelitätsgrades., and . ARCS, page 133-142. VDE Verlag, (1997)Modelling and measurement of memory access in SIEMENS VP supercomputers., , , and . Parallel Comput., 11 (3): 361-365 (1989)Objektorientierte Graphendarstellung von Simulink-Modellen zur einfachen Analyse und Transformation., , , , , and . CoRR, (2014)The >S<puter: Introducing a Novel Concept for Dispatching Instructions Using Reconfigurable Hardware., and . FPL, volume 1482 of Lecture Notes in Computer Science, page 510-514. Springer, (1998)The Universal Configurable Block/Machine-- An Approach for a Configurable SoC-Architecture., and . J. Supercomput., 26 (3): 309-331 (2003)