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Disambiguation of "Garimella, Annajirao"

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Low voltage gain boosting schemes for one stage operational amplifiers.

, , , , , and . ECCTD, page 531-534. IEEE, (2007)

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Kiran Garimella

Sita Ram Garimella

 

Other publications of authors with the same name

Single Miller compensation using inverting current buffer for multi-stage amplifiers., , and . ISCAS, page 1579-1582. IEEE, (2010)A 22dB PSRR enhancement in a two-stage CMOS opamp using tail compensation., , , and . CICC, page 1-4. IEEE, (2012)Low dropout (LDO) voltage regulator design using split-length compensation., , , and . MWSCAS, page 1088-1091. IEEE, (2012)VLSI Implementation of Online Digital Watermarking Technique with Difference Encoding for 8-Bit Gray Scale Images., , , , and . VLSI Design, page 283-. IEEE Computer Society, (2003)A 1.21V, 100mA, 0.1µF-10µF output capacitor low drop-out voltage regulator for SoC applications., and . ICECS, page 375-378. IEEE, (2009)Reverse Nested Miller Compensation Using Current Buffers in a Three-Stage LDO., , and . IEEE Trans. Circuits Syst. II Express Briefs, 57-II (4): 250-254 (2010)Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview., , and . VLSI Design, page 131-136. IEEE Computer Society, (2012)Low voltage gain boosting schemes for one stage operational amplifiers., , , , , and . ECCTD, page 531-534. IEEE, (2007)On the analysis of low output impedance characteristic of flipped voltage follower (FVF) and FVF LDOs., , , and . MWSCAS, page 17-20. IEEE, (2017)Voltage buffer compensation using Flipped Voltage Follower in a two-stage CMOS op-amp., , , , and . MWSCAS, page 1-4. IEEE, (2015)