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Formal specification of networks-on-chips: deadlock and evacuation.

, and . DATE, page 1701-1706. IEEE Computer Society, (2010)

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Formal specification of networks-on-chips: deadlock and evacuation., and . DATE, page 1701-1706. IEEE Computer Society, (2010)On Two Models of Noninterference: Rushby and Greve, Wilding, and Vanfleet., , , , and . SAFECOMP, volume 8666 of Lecture Notes in Computer Science, page 246-261. Springer, (2014)Verification of Functional Correctness of Code Diversification Techniques., , and . NFM, volume 12673 of Lecture Notes in Computer Science, page 160-179. Springer, (2021)HMTRace: Hardware-Assisted Memory-Tagging based Dynamic Data Race Detection., , , , and . CoRR, (2024)On the Decidability of Disassembling Binaries., , and . TASE, volume 14777 of Lecture Notes in Computer Science, page 127-145. Springer, (2024)A benchmark for C program verification., , , , , , , , , and . CoRR, (2019)Formally verified big step semantics out of x86-64 binaries., , and . CPP, page 181-195. ACM, (2019)Automatic generation of deadlock detection algorithms for a family of microarchitecture description languages of communication fabrics., and . HLDVT, page 25-32. IEEE Computer Society, (2012)Formal Deadlock Verification for Click Circuits., , and . ASYNC, page 183-190. IEEE Computer Society, (2013)Estimating worst-case latency of on-chip interconnects with formal simulation., and . FMCAD, page 204-211. IEEE, (2017)