Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A fast thermal-aware fixed-outline floorplanning methodology based on analytical models.

J. Lin, T. Chen, Y. Chang, W. Chang, Y. Shyu, Y. Chang, and J. Lu. ICCAD, page 1:1-1:8. ACM, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ming-Kuei Lu

Lu Lu

Jorge Mínguez

Karl Minga

Helmar Minger

Other publications of authors with the same name

Design space exploration with a cycle-accurate systemC/TLM DRAM controller model.T. Hsu, C. Wu, C. Hsu, C. Huang, J. Liou, Y. Chen, and J. Lu. VLSI-DAT, page 1-4. IEEE, (2017)Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D IC.J. Lin, W. Chang, H. Hsieh, Y. Shyu, Y. Chang, and J. Lu. IEEE Trans. Very Large Scale Integr. Syst., 29 (9): 1652-1664 (2021)Tile-Based Architecture Exploration for Convolutional Accelerators in Deep Neural Networks.Y. Chen, Y. Yen, C. Chen, T. Chen, C. Huang, J. Liou, and J. Lu. AICAS, page 1-4. IEEE, (2021)A 90nm 103.14 TOPS/W Binary-Weight Spiking Neural Network CMOS ASIC for Real-Time Object Classification.P. Chuang, P. Tan, C. Wu, and J. Lu. DAC, page 1-6. IEEE, (2020)Methodology of exploring ESL/RTL many-core platforms for developing embedded parallel applications.J. Lai, C. Huang, T. Hsu, J. Liou, T. Yeh, L. Cheng, and J. Lu. SoCC, page 286-291. IEEE, (2014)Thermal-Aware Fixed-Outline Floorplanning Using Analytical Models With Thermal-Force Modulation.J. Lin, T. Chen, H. Hsieh, Y. Shyu, Y. Chang, and J. Lu. IEEE Trans. Very Large Scale Integr. Syst., 29 (5): 985-997 (2021)NNSim: A Fast and Accurate SystemC/TLM Simulator for Deep Convolutional Neural Network Accelerators.Y. Lee, T. Hsu, C. Chen, J. Liou, and J. Lu. VLSI-DAT, page 1-4. IEEE, (2019)Reconfigurable Network-on-chip design for heterogeneous multi-core system architecture.J. Shen, P. Hsiung, and J. Lu. HPCS, page 523-526. IEEE, (2014)A Power-Efficient Binary-Weight Spiking Neural Network Architecture for Real-Time Object Classification.P. Tan, P. Chuang, Y. Lin, C. Wu, and J. Lu. CoRR, (2020)HierArch: A Cluster-Based DNN Accelerator with Hierarchical Buses for Design Space Exploration.J. Huang, T. Chou, J. Lu, C. Huang, and J. Liou. SOCC, page 1-6. IEEE, (2023)

BibSonomy

Disambiguation of "Lu, Juin-Ming"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A fast thermal-aware fixed-outline floorplanning methodology based on analytical models.

Please choose a person to relate this publication to

Ming-Kuei Lu

Lu Lu

Jorge Mínguez

Karl Minga

Helmar Minger

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lu, Juin-Ming"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A fast thermal-aware fixed-outline floorplanning methodology based on analytical models.

Please choose a person to relate this publication to

Ming-Kuei Lu

Lu Lu

Jorge Mínguez

Karl Minga

Helmar Minger

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A fast thermal-aware fixed-outline floorplanning methodology based on analytical models.