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Design of a Residue Number System Based Linear System Solver in Hardware., , , и . J. Signal Process. Syst., 87 (3): 343-356 (2017)Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System., , и . DDECS, стр. 357-360. IEEE Computer Society, (2007)Design of a High-Throughput Match Search Unit for Lossless Compression Algorithms., , и . CCWC, стр. 732-738. IEEE, (2019)An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA., , и . DSD, стр. 96-99. IEEE Computer Society, (2008)Low Power Wireless Data Transfer for Internet of Things: GSM Network Measuring Results., , и . MECO, стр. 1-5. IEEE, (2020)Feasibility of a Neural Network with Linearly Approximated Functions on Zynq FPGA., и . ICECS 2022, стр. 1-4. IEEE, (2022)Approximate arithmetic for modern neural networks and FPGAs., и . MECO, стр. 1-4. IEEE, (2022)Fault Models Usability Study for On-line Tested FPGA., , , и . DSD, стр. 287-290. IEEE Computer Society, (2011)LZ4 compression algorithm on FPGA., , и . ICECS, стр. 179-182. IEEE, (2015)Dependability Computation for Fault Tolerant Reconfigurable Duplex System., , и . DDECS, стр. 100-102. IEEE Computer Society, (2006)