( en | de | ru )

 

Disambiguation of "Song, Ki-Whan"

Author of the publication

copydeleteadd this publication to your clipboard
Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-Valued Logic.

, , , , , , , , and . ISMVL, page 267-272. IEEE Computer Society, (2003)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ki-Whan Kwon

Ki-Whan Choi

Song-Ki Kim

Ki-tschul Song

Song Song

 

Other publications of authors with the same name

Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH., , , , , , , , , and . VLSIC, page 136-137. IEEE, (2012)A 1Tb 4b/cell 64-stacked-WL 3D NAND flash memory with 12MB/s program throughput., , , , , , , , , and 32 other author(s). ISSCC, page 340-342. IEEE, (2018)A 512Gb 3-bit/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s Interface., , , , , , , , , and 39 other author(s). ISSCC, page 216-218. IEEE, (2019)A 512-mb DDR3 SDRAM prototype with CIO minimization and self-calibration techniques., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 41 (4): 831-838 (2006)The novel SCR-based ESD protection with low triggering and high holding voltages., , , and . Microelectron. J., 42 (6): 837-839 (2011)Electric Field Impact on Lateral Charge Diffusivity in Charge Trapping 3D NAND Flash Memory., , , , , , and . IRPS, page 29-1. IEEE, (2022)A flash memory controller for 15μs ultra-low-latency SSD using high-speed 3D NAND flash with 3μs read time., , , , , , , , , and 9 other author(s). ISSCC, page 338-340. IEEE, (2018)A 2.5-V 2.0-Gbyte/s 288-Mb packet-based DRAM with enhanced cell efficiency and noise immunity., , , , , , , , , and . IEEE J. Solid State Circuits, 36 (5): 735-743 (2001)A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW., , , , , , , , , and 25 other author(s). ISSCC, page 500-502. IEEE, (2011)Novel Electrical Detection Method for Random Defects on Peripheral Circuits in NAND Flash Memory., , , , , , , , , and 3 other author(s). IRPS, page 40-1. IEEE, (2022)