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Generalized external interaction with tamper-resistant hardware with bounded information leakage.

, , , , and . CCSW, page 23-34. ACM, (2013)

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A framework to accelerate sequential programs on homogeneous multicores., , , and . VLSI-SoC, page 344-347. IEEE, (2013)Compilation Techniques for Efficient Encrypted Computation., , and . IACR Cryptology ePrint Archive, (2012)Exploring Many-Core Design Templates for FPGAs and ASICs., , , , , , , and . Int. J. Reconfigurable Comput., (2012)ParaLearn: a massively parallel, scalable system for learning interaction networks on FPGAs., , , , , and . ICS, page 83-94. ACM, (2010)Minotaur: Adapting Software Testing Techniques for Hardware Errors., , , , , , and . ASPLOS, page 1087-1103. ACM, (2019)Towards an interpreter for efficient encrypted computation., , and . CCSW, page 83-94. ACM, (2012)Declassiflow: A Static Analysis for Modeling Non-Speculative Knowledge to Relax Speculative Execution Security Measures., , , , and . CCS, page 2053-2067. ACM, (2023)Data Oblivious ISA Extensions for Side Channel-Resistant and High Performance Computing., , , and . NDSS, The Internet Society, (2019)Custos: Practical Tamper-Evident Auditing of Operating Systems Using Trusted Execution., , , , , , and . NDSS, The Internet Society, (2020)ZeroTrace : Oblivious Memory Primitives from Intel SGX., , and . NDSS, The Internet Society, (2018)