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Exploring Compiler Optimization Opportunities for the OpenMP 4.× Accelerator Model on a POWER8+GPU Platform.

, , , , and . WACCPD@SC, page 68-78. IEEE Computer Society, (2016)

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Memory-access-aware Safety and Profitability Analysis for Transformation of Accelerator-bound OpenMP Loops., , , , and . ACM Trans. Archit. Code Optim., 16 (3): 30:1-30:26 (2019)Performance evaluation of OpenMP's target construct on GPUs - exploring compiler optimisations., , , , and . Int. J. High Perform. Comput. Netw., 13 (1): 54-69 (2019)Run-Length Base-Delta Encoding for High-Speed Compression., , , and . ICPP Workshops, page 29:1-29:9. ACM, (2018)Compiler-driven performance workshop., and . CASCON, page 374-376. ACM, (2018)Automatic communication coalescing for irregular computations in UPC language., , , and . CASCON, page 220-234. IBM / ACM, (2012)OpenMP tasks in IBM XL compilers., , , , , , and . CASCON, page 16. IBM, (2008)Using shared-data localization to reduce the cost of inspector-execution in unified-parallel-C programs., , , , and . Parallel Comput., (2016)Combining Static and Dynamic Data Coalescing in Unified Parallel C., , , , and . IEEE Trans. Parallel Distributed Syst., 27 (2): 381-393 (2016)Experiences Building an MLIR-Based SYCL Compiler., , , , , , , and . CGO, page 399-410. IEEE, (2024)Leveraging MLIR for Better SYCL Compilation (Poster)., , , , , , , and . IWOCL, page 21:1. ACM, (2023)